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The SignalProbe feature allows you to route user-specified signals to output pins without affecting the existing fitting in a design, so that you can debug signals without completing a full compilation.
When you investigate signals, you can use either I/O pins reserved prior to a compilation or unused I/O pins in a post-compilation design as SignalProbe outputs. After you assign an I/O pin as a SignalProbe output pin, you can assign a SignalProbe source to the output pin. You must assign a SignalProbe source from a post-compilation design, and the source cannot be an Excalibur stripe I/O pin, a dedicated clock, a DDIO output pin, or a group or bus, and cannot have a carry or cascade chain fan-out. You can use the SignalProbe filter in the Node Finder dialog box to find a list of available SignalProbe sources.
You can compile a design with the SignalProbe feature after you assign sources to the SignalProbe output pins. A SignalProbe compilation compiles a design without affecting the design's fitting and routes the SignalProbe signal faster than in a normal compilation. If the Compiler cannot route SignalProbe signals during a SignalProbe compilation, you can allow the Compiler to route SignalProbe signals by modifying the design's fitting.
Once you complete your investigation of signals, you can keep or remove all or some of the SignalProbe routing. If you keep SignalProbe routing in a design, you can automatically route SignalProbe routing during a normal compilation.
You can also use the SignalProbe feature with Tcl. With Tcl commands, you can add and remove SignalProbe assignments and sources, perform a SignalProbe compilation on a design, and compile routed SignalProbe signals in a normal compilation.
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More information is available on the SignalProbe feature on the Altera® web site. | |
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