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4.5 Bullwinkle Interface Specification

 

The Bullwinkle base I/O port address is DIP-switch selectable from the values 200, 220, 240, ..., 3E0, like the Rocky address. For sake of simplicity, assume that we are using port 300.

An I/O port read from any address in the range 300-30F results in an 8-bit Bullwinkle Status byte, containing the values shown in Table 4.1.

  
Table 4.1: Bullwinkle Status Register

Note that the Init output of an XC3000 FPGA becomes a user I/O after configuration. In natasha, it is connected to the Almost Full output so that the PC can check this value through port writes.

I/O port writes convey information to the control GALs via the lower four bits of the address, not the data bits. Hence, any value can be output, only the address matters. The actions caused by the various port writes are listed in Table 4.2. The address shown assumes a base port address of 300 (hex).

  
Table 4.2: Bullwinkle Port Control Specification



Scott E. Harrington
Sat Apr 29 18:56:25 EDT 1995