Foil 6.7 : address decoder

Address decoders

address decoders are used for memory chips to decode binary adresses

An address decoder may be incorporated into a memory block for the internal addressing or may be developed for the external addressing to select (activate) one from several memory blocks

an address decoder has n encoded input lines and 2ⁿ output lines (decoded)

truth table for an 2-4 binary decoder:

inputs (a)

a(15) a(14)

outputs(x)

=> s(3) s(2) s(1) s(0)

0.....0

0.....1

1.....0

1.....1

=> 0....0....0....1

=> 0....0....1....0

=> 0....1....0....0

=> 1....0....0....0

library IEEE;

use IEEE.std_logic_1164.all;

use IEEE.numeric_std.all;

entity dec_2to4 is

port(as: in unsigned (1 downto 0); s: out unsigned(3 downto 0));

end dec_2to4;

-- only 2 lines: a(15) and a(14) are mapped onto as input

architecture process_dec_1 of dec_2to4 is

begin

process(as)

variable int_s integer range 0 to 3;

begin

int_s := to_integer(as); -- from IEEE.numeric_std

case int_s is

when 0 => s <= "0001";

when 1 => s <= "0010";

when 2 => s <= "0100";

when 3 => s <= "1000";

end case;

end process;

end process_dec_1;

Exercise:

Develop an address decoder with an additional 4 outputs for the selection of

one of four subsections inside the section s0(a(15)=0 and a(14)=0)

Decode a(13) and a(12) lines.