Design Implementation (cont.)
After Datapath is finished, do FSM VHDL code
- ALWAYS bring the FSM state value out as an external output for debugging purposes!!!
- Should be able to write FSM code directly from ASM chart
DEBUG - take a systematic approach
- Your design will NOT WORK the first time - be prepared to debug.
- Attach external pins to as many internal nets as possible so that you can observe the internal net values
- Debug your design ONE state at a time. Do not test the next state until the current state works as expected.