PPT Slide
cpu1750a - tristate signals to pads here
cpucore - structural
biu - external bus interface
aproc - structural
incdec - increment,decrement
aproclogic - IC, MAR
dpath - structural
rf - structural
rfcore - 16 GPR regs (latches)
rflogic - buffer regs for in/out data, RF addressing
alulogic - all ALU functions except +/-
addsub - ALU adder/subtractor
constants - constants generation
fault - interrupt logic
ioproc - temp regs for IO, mul/div ops
decode - opcode decode
control - structural
fsm0 - fsm nstate logic
fsm1 - fsm nstate logic
fsm2 - fsm nstate logic
…..
fsm6 - fsm nstate logic
merge - merge for fsm0:fsm6 outputs
cstate - fsm state registers