작성일: 2016.03.11

Digital Logic Simulation and Synthesis Using Modelsim, Precision RTL, and Xilinx ISE

Ted Obuchowicz

VLSI/CAD Specialist
Department of Electrical and Computer Engineering
Concordia University

July , 1998
Revised: July , 2011

* 파일명: titlepage.pdf (277,535 bytes) *download*
* 파일명: toc.pdf (11,702 bytes) *download*
* 파일명: tutorial.pdf (2,948,625 bytes) *download*

출처: http://aits.encs.concordia.ca/helpdesk/resource/tutorial.html

* Engineering & Computer Science, Concordia Univ. *

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