Address	Bits	r/w	Description:
(hex)	(dec)
000	1	r	pci internal bus grant  (from PCI interface)
000	0	r/w	pci internal bus request  (from PCI interface)
000	1	r/w	usb internal bus active (from usb interface) (writing has no effect)
000	0	r/w	pci internal bus active (from usb interface) (writing has no effect)

001	1	r/w	DAC output enable
002	15:2	r/w	scratch registers
002	1	r/w	DAC memory read clock polarity
002	0	r/w	DAC output clock polarity
003		r/w	DAC clock prescaler 15:0	
004		r/w	DAC clock prescaler 31:16
005		r/w	DAC waveform end address 15:0
006		r/w 	DAC waveform end address 18:16

007		r/w	ram block start address 15:0
008		r/w 	ram block start address 18:0
009	9:0	r/w	ram block length
00a	2	r/w	ram block transfer start
00a	1	r/w	ram block transfer write
00a	0	r/w	ram block transfer active

00b	2	r	pci memory enable
00b	1	r	pci internal bus grant
00b	0	r	pci internal bus request
00c		r	pci memory base address 18:3
00d	15:13	r	pci memory base address 2:0

100-1ff	15:12	r/w	pci analyzer memory for CBE[3:0]
100-1ff	11	r/w	pci analyzer memory for TRDY
100-1ff	10	r/w	pci analyzer memory for IRDY
100-1ff	9	r/w	pci analyzer memory for FRAME
100-1ff	8	r/w	pci analyzer memory for DEVSEL
100-1ff	7	r/w	pci analyzer memory for IDSEL
100-1ff	6:0	r/w	pci analyzer memory for AD[22:16]
200-2ff		r/w	pci analyzer memory for AD[15:0] 
300	7:0	r	Current head of pci analyzer buffer
301		r/w	Bits 18:3 of pci base memory address for analyzer
302	15:13	r/w	Bits 2:0 of pci base memory address for analyzer
303	0	r/w	Enable PCI analyzer

400-7ff		r/w	Buffer for reading and writing external SRAM