|   Variable  | 
      Result  | 
  
  
    |   argc  | 
      returns the total number of parameters passed to the current macro  | 
  
  
    |   architecture  | 
      returns the name of the top-level architecture currently being simulated; for a configuration or Verilog module, this variable returns an empty string  | 
  
  
    |   configuration  | 
      returns the name of the top-level configuration currently being simulated; returns an empty string if no configuration  | 
  
  
    |   delta  | 
      returns the number of the current simulator iteration  | 
  
  
    |   entity  | 
      returns the name of the top-level VHDL entity or Verilog module currently being simulated  | 
  
  
    |   library  | 
      returns the library name for the current region  | 
  
  
    |   MacroNestingLevel  | 
      returns the current depth of macro call nesting  | 
  
  
    |   n  | 
      represents a macro parameter, where n can be an integer in the range 1-9  | 
  
  
    |   Now  | 
      returns the current simulation time expressed in the current time resolution (e.g., 1000 ns)  | 
  
  
    |   now  | 
      returns the current simulation time as an absolute number of time steps (e.g., 1000)  | 
  
  
    |   resolution  | 
      returns the current simulation time resolution  |