Verilog numbering conventions

Verilog numbers are expressed in the style:

[ - ] [ size ] [ base ] value


  

  

    
 
Element
    
 
Description
  
  

    
 
- 
    
 
indicates a negative number; optional
  
  

    
 
size 
    
 
the number of bits in the number; optional
  
  

    
 
base 
    
 
specifies the base; binary: `b or `B, octal: `o or `O, decimal: `d or `D, hex: `h or `H; optional
  
  

    
 
value
    
 
specifies digits in the appropriate base with optional underscore separators; default is decimal, required
  





 

Note: A `-' can also be used to designate a "don't care" element when you search for a signal in the List or Wave windows. If you want the `-' to be read as a "don't care" element, rather than a negative sign, be sure to enclose the number in double quotes. For instance, you would type "-0110--" as opposed to 7'b-0110--. If you don't include the double quotes, ModelSim will read the `-' as a negative sign.

Examples

`b11111110                 8`b11111110
`Hffca23                   21`H1fca23
-23749 

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