VHDL

Expressions


Quartus® II support for expressions is described below. Section numbers match those in both the IEEE Std 1076-1987 and the IEEE Std 1076-1993 versions of the IEEE Standard VHDL Language Reference Manual.

Section VHDL Construct VHDL 1987 Support     Note (1) VHDL 1993 Support     Note (1)
7.1 Expressions Supported. Supported.
7.2 Operators Supported as defined below. Supported as defined below.
7.2.1 Logical Operators Supported. Supported.
7.2.2 Relational Operators Supported. Supported.
7.2.3 (1993) Shift Operators n/a Supported.
7.2.3 (1987)
7.2.4 (1993)
Adding Operators Supported. Supported.
7.2.4 (1987)
7.2.6 (1993)
Multiplying Operators Supported. Supported.
7.2.5 (1993) Sign Operators n/a Supported.
7.2.5 (1987)
7.2.7 (1993)
Miscellaneous Operators Supported. ** (exponentiation) is supported only for constant left-hand side (LHS) and right-hand side (RHS) operands. For example, 2**5. Supported. ** (exponentiation) is supported only for constant left-hand side (LHS) and right-hand side (RHS) operands. For example, 2**5.
7.3 Operands Supported as defined below. Supported as defined below.
7.3.1 Literals Supported Supported
7.3.2 Aggregates Supported for one- and two-dimensional arrays of scalar elements only. Supported for one- and two-dimensional arrays of scalar elements only.
7.3.2.1 Record Aggregates Not supported Not supported
7.3.2.2 Array Aggregates Supported for one- and two-dimensional arrays of scalar elements only Supported for one- and two-dimensional arrays of scalar elements only
7.3.3 Function Calls Supported for Process Statements Supported for Process Statements
7.3.4 Qualified Expressions Supported Supported
7.3.5 Type Conversions Supported Supported
7.3.6 Allocators Not supported. Not supported.
7.4 Static Expressions Supported Supported
7.4.1 (1993) Locally Static Primaries n/a Not Supported
7.4.2 (1993) Globally Static Primaries n/a Not Supported
7.5 Universal Expressions Supported Supported


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