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Displays information about the interconnection of the logic cells in a MAX® 3000 or MAX 7000 device.
Information is provided as follows:
| Heading | Description | Value |
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| LAB | Shows the LAB name that contains the specific logic cell. | <LAB name> |
| Logic Cell Name | Shows the name of the logic cell. | <logic cell name> |
| Input | Shows the logic cells and pins that feed into the specific logic cell. | <logic cell or pin name(s)> |
| Output | Shows the logic cells and pins that are fed by the specific logic cell. | <logic cell or pin name> |
The following example shows a portion of the Logic Cell Interconnection section generated for a sample design:
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- PLDWorld - |
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