PJN

Verilog HDL Input Page (Settings Dialog Box)

NOTE You can open this page from the Settings dialog box (Assignments menu).

Allows you to specify options for compiling and simulating Verilog HDL input files in the Quartus® II software.

Pointer Click any item in this picture for information on that item:
Verilog HDL Input Page HDL Input Settings EDA Tool Settings Default Logic Option Settings Default Parameter Settings Timing Settings Compiler Settings Simulator Settings Software Build Settings Stratix<FONT SIZE='-1'><SUP>™</SUP></FONT><FONT SIZE=\'-1\'><SUP>™</SUP></FONT> GX Registration HardCopy<FONT SIZE='-1'><SUP>™</SUP></FONT><FONT SIZE=\'-1\'><SUP>™</SUP></FONT> Settings OK Cancel Files & Directories Page VHDL Input Page Verilog version Library Mapping File


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