teaching pointer Doulos VHDL Training and Verilog Training Courses

Why Doulos’ VHDL training courses and Verilog training courses are “Simply The Best”


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From the start of our first VHDL training programme in 1990, the Doulos goal has been to enable engineers to be successful with the application of VHDL and Verilog rather than presenting the languages as an end in themselves. This has required a sustained commitment to a high quality of course material and provision and a determination to avoid gimmicks and compromises.

calendar iconWorldwide Course Schedule
teaching designComprehensive VHDL for FPGA/ASIC
chip iconVerilog for FPGA and ASIC Design
teaching designAVT, Advanced VHDL Techniques
chip iconAdvanced VHDL for Synthesis
electronic diagramComprehensive VHDL for Systems
hierarchy iconVHDL Seminar for Managers
custom magicMade-to-measure Training


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This page was last updated 27th February 1997

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