Lock Thrashing
Assume N processors all have shared versions of the lock
Processor Cj releases the lock (to release the lock, must WRITE to the memory location).
- Causes all other processors to invalidate this memory location
- First processor to be granted access to bus will gain control of the lock and will do a write to the lock
- This processor will then have to do N-2 bus transactions to provide dirty copy of lock to other processors.