Programming the Tera Multiprocessor (cont)
Tera Multiprocessor also does not support any type of branch prediction
- Does not need it because of instruction latency
Also does not implement any forwarding paths within the CPU because of instruction latency
- Straight-forward pipeline
- Register renaming not needed either since instruction result will have been written to the register file by the time the result needed!
- Do not need a Re-order buffer either since no need for out of order execution!