Addressing Memory Latency
How do Virtual memory systems address the memory latency problem when a MISS causes a disk access to swap in the needed memory page?
- The operating system switches tasks. An IO processor takes the job of resolving the page fault; once the page fault is resolved the task can be resumed. Meanwhile, the CPU is executing an alternate task.
Multi-threaded architectures pushes this approach to the limit by switching tasks every clock cycle!!
- Task switching every clock services task in a round robin fashion, hiding memory latency equal to the length of time it takes to go through all of the tasks