MPL VHDL Model Collection

Xilinx LCA Upload

This form allows you to upload an lca file and optionally a map file for the purposes of converting the lca file to a vhdl entity/architecture pair. The form uses a Perl script, lca2vhd , to perform the conversion. Please feel free to provide us feedback on the LCA upload process or Xilinx model.

Email Address (required)
lca file

Options

pin/net map file
spc timing file

Yes No Simple Net Names

Maximum Converted Name Length

Architecture Name