EE295 - ASIC Design Using VHDL

Attributes

Assignment: Read Ch 6

Outline:

• Predefined Attributes
• Value Kind - Returns a Value Providing Information About:
  • Type : Bounds
  • Array : Length
  • Block : Information
• Function Kind - Performs a Function Call to Provide Information About:
  • Type : Bounds
  • Array : Length
  • Signal : Information
• Signal Kind - Creates a Signal to Indicate a Signal's History:
  • 'DELAYED
  • 'QUIET
  • 'STABLE
  • 'TRANSACTION
• Type Kind - For a Base or SubType
• Range Kind - For Loop Iteration Control
• User Defined Attributes - For Methodology Purposes. From Chap 8 - Pg 211

PreDefined Attributes

• Syntax:
  • object'attribute
  • pronounced 'tick'
• PreDefined Attributes are Obtained from..
  • Signals
  • Blocks
  • Type/Subtype
• ..and Fall Into These Attribute Categories:
  • Value - Evaluates to a Value
  • Function - A function call returns a Value
  • Signal - An Implicit Signal is Created Whose Value Depends on the Original Signal the Attribute was Attached too.
  • Range - Range of an Object is Returned
  • Type - The Type of an Object is Returned
• May be Cascaded - Within the Limits of Type Matching

Value Type

Type:

type'HIGH

Returns Upper Bound of a Type/SubType

type'LOW

Returns Lower Bound of a Type/SubType

type'LEFT

Returns Left Bound of a Type/SubType

type'RIGHT

Returns Right Bound of a Type/SubType

Array:

array'LENGTH

Returns the length of an array

Block:

architecture_name'STRUCTURE

True if Architecture/Block is Comprised of Components and Passive Processes; False Otherwise

architecture_name'BEHAVIOR

True if Architecture/Block Contains No Components; False Otherwise

Function Kind

A Function Call is Executed to Evaluate..

Function Type - Return Type Values

type'POS(value)

Position Number of Given Value

type'VAL(value)

Value of Given Position

type'SUCC(value)

Next Value After Given Value

type'PRED(value)

Previous Value

type'LEFTOF(value)

Value Left of Value

type'RIGHTOF(value)

Value Right of Value

Function Array - Return Array Bounds

array'HIGH(n)

Upper Bound

array'LOW(n)

Lower Bound

array'LEFT(n)

Left Bound of Index

array'RIGHT(n)

Right Bound of Index

• For Ascending Ranges..
  • array'LEFT = array'LOW
  • array'RIGHT = array'HIGH
• For Descending Ranges..
  • array'LEFT = array'HIGH
  • array'RIGHT = array'LOW

Function Signal - Return Signal History Information

signal'EVENT

Returns true if an event occurred in the current delta; otherwise false

signal'ACTIVE

Returns true if a transaction occurred in the current delta; otherwise false

signal'LAST_EVENT

Returns time since last event

signal'LAST_VALUE

Returns value of signal prior to last event

signal'LAST_ACTIVE

Returns time since last transaction

Signal Kind

signal'DELAYED[(time)]

• my_sig'DELAYED(n)
• Creates a Delayed Version of Signal
• Delayed by n - a Value of Type Time
  • Defaults to 0
  • Delayed by a Delta Time
• Use:
  • Hold Test on a Latch Cell Model, RAM, etc
  • Insure Data has Held Constant Value for Minimum Time

signal'STABLE[(time)]

• Signal of Type Boolean
• Evaluates to 'True' or 'False' ( not 0 or 1 )
• True if No Events Occurred for the Time Specified

signal'QUIET[(time)]

• Signal of Type Boolean
• Indicates a Transaction has Occurred
• True if No Transactions Occurred for the Specified Time

signal'TRANSACTION

• Signal of Type Bit; '0'..'1'
• Toggles for Every Transaction that Occurrs on signal

'BASE

• subtype'BASE
• Used in Context of SubTypes
• Returns a SubTypes Heritage

'RANGE / 'REVERSE_RANGE

• Function That Returns a Type Range Value
• Used to Control Loop Iteration
  • Describing Growable Macros ( N-Bit Gates, N-Bit RAM )
  • Conversion Functions
  • Working with Enumerated Types

User Defined Attributes

From Chap 8; Pg 211-213

• A Language Extension Mechanism
• A Mechanism for Defining and Attaching Pertinent Information to a Design Object
• May Appear in a Downstream Netlist or Report
• May Control Outcome of a Downstream Design Process

  VHDL Contains no Such Definition - These are Conventions to be Worked Out on a Vendor-by-Vendor, Tool-by-Tool Basis

• Defined in any Declarative Region: Package, Entity, Architecture, Function.
• Attach to
  • Components, Configurations
  • Entities, Architectures, Label
  • Procedures, Functions, Package
  • Type, SubType
  • Ports, Signals, Variables, Constants
• Declaration Example:
  • ATTRIBUTE is_clk : boolean;
  • ATTRIBUTE cell_name : array (natural range <>) of char;
  • SIGNAL my_clk : bit;
• Example of Use:
  • ATTRIBUTE clk OF my_clk : signal is true;
  • Attachs the Attribute Value
  • IF my_clk'is_clk THEN
  • Uses the Attribute Value