Step-by-step Instructions from Schematic

1. Open an FPGA frame schematic such as the GERM frame (optional) in ViewDraw. This provides all the pads connected to IBUF and OBUF components. A GERM frame can be found in /opt/digital/share/tutorials/Powerview_to_FPGA/fpga/sch.

2. Draw your circuit using xc3000 or xc4000 library components, depending on the chip that is available for you to program (look at the numbers on the chip). Connect external inputs and outputs to IBUF, OBUF, IBUFT, OBUFT, OFF, GCLK, or similar components. Connect these in turn to IPAD, OPAD, or IOPAD components. Add attributes such as PAD=P71 to the pads if it is necessary to force them to a particular pin. Pad locations can also be specified by a CST constraint file input to APR or PPR.

3. Write the schematic WIR file (wir/design.1) from ViewDraw (File->Write).

4. Open the XDM environment and select the family and part (such as XC3000, 3030, -50).

5. Run XMAKE from XDM. Choose design.1 as the schematic input to the XMAKE process, and select Make Bitstream as the output goal. This causes the following chain of events assuming all goes well. You can examine the file design.mak for details on what tools are being run.

   WHAT XMAKE DOES FOR THE XC3000 FAMILY FROM VIEWDRAW (It is not crucial that you know these details, in fact they tend to change a lot with new Xilinx software releases.)

   1. WIR2XNF produces an XNF file from your schematic as well as from each non-atomic Xilinx library component in your design (such as multi-bit comparators or registers, or multiplexors). These are stored in the xnf/ subdirectory.
   2. XNFMERGE flattens the hierarchy of XNF files into an XFF file.
   3. XNFPREP removes unused logic and performs a design rule check on the XFF file, producing an XTF file.
   4. XNFMAP translates the XTF file into a MAP file.
   5. MAP2LCA translates the MAP file into an LCA file.
   6. APR automatically places and routes the LCA file.
   7. MAKEBITS extracts the programming information from the routed LCA file and writes it to a BIT file.

   WHAT XMAKE DOES FOR THE XC4000 FAMILY FROM VIEWDRAW

   If you used XBLOX components in your schematic, XMAKE runs the appropiate XBLOX program to produce an XG file before the XNFPREP stage. Also, PPR is run to partition, place, and route the LCA file instead of APR.

6. If the steps to this point have been successful, you can either simulate the design or download it to the FPGA and try it out.
   • Simulate the Placed and Routed Design
   • Test a GERM design
   • Test a custom design - see Address Tracing System hardware design sections.